Bloomfield has many new features that represent significant changes from Yorkfield:
- The new LGA 1366 socket is incompatible with earlier processors.
- On-die memory controller: the memory is directly connected to the processor. It is called the uncore part and runs at a different clock (uncore clock) than the execution cores.
- The front side bus has been replaced by the Intel QuickPath Interconnect interface. Motherboards must use a chipset that supports QuickPath Interconnect.
- The following caches:
- 32 kB L1 instruction and 32 kB L1 data cache per core
- 256 kB L2 cache (combined instruction and data) per core
- 8 MB L3 (combined instruction and data) "inclusive", shared by all cores
- Single-die device: all four cores, the memory controller, and all cache are on a single die, instead of a Multi-chip module of two dual-core dies as in Yorkfield
- "Turbo Boost" technology allows all active cores to intelligently clock themselves up in steps of 133 MHz over the design clock rate as long as the CPU's predetermined thermal and electrical requirements are still met.
- Re-implemented Hyper-threading. Hyperthreading was introduced in the older NetBurst microarchitecture, but omitted from the subsequent Core, which was a descendant of the Pentium III family. With hyperthreading enabled, each of the four physical cores can process up to two threads simultaneously, so the processor appears to the OS as eight logical CPUs.
- Only one QuickPath interface: not intended for multi-processor motherboards.
- 45 nm process technology.
- 731 million transistors.
- 263 mm2 die size.
- Sophisticated power management can place an unused core in a zero-power mode.
- Support for SSE4.2 & SSE4.1 instruction sets.
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